Why does the system console tool report several errors when loading a design that enables PCI* Link inspector and includes more than one instance of the Intel® Stratix® 10 Hard IP for PCI Express? - Why does the system console tool report several errors when loading a design that enables PCI* Link inspector and includes more than one instance of the Intel® Stratix® 10 Hard IP for PCI Express? Description Due to a problem in the Intel® Quartus® Prime Pro edition software version 20.2, you may see below errors when loading a design that enables PCI* Link inspector and includes more than one instance of the Intel® Stratix® 10 Hard IP for PCI* Express. SEVERE: Failed to query if the PHY has PRBS soft logic SEVERE: Failed to query the PHY's number of channels SEVERE: Failed to query if the PHY has ODI soft logic Resolution This problem has been fixed starting with the Intel® Quartus® Prime Pro edition software version 20.3 and later. Custom Fields values: ['novalue'] Troubleshooting 14011318578 False ['Avalon-MM Stratix® 10 Hard IP for PCI Express', 'Avalon-ST Stratix® 10 Hard IP for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.3 20.2 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']