Quartus Error When No Read Path Exists on F2H Bridge - Quartus Error When No Read Path Exists on F2H Bridge Hello, I am currently investigating a Quartus compilation error related to the FPGA-to-HPS (F2H) bridge on Agilex 5 devices. [Environment] Device: Agilex 5 Tool: Quartus Prime Pro v25.3 [Issue / Observed Behavior] Connection configuration: mSGDMA (Streaming to MM) -> CCT -> F2H bridge (see attached diagram) HDL generation in Platform Designer completes successfully In the RTL Viewer, the F2H-related logic appears to be instantiated, and the F2SOC_RDATA signal seems to be present in the generated RTL However, during Quartus Prime compilation (Synthesis phase), the following errors occur: [Workarounds / Configuration Changes Tested] To ensure that a Read path toward the F2H bridge exists, we tested the following changes: Connecting the F2H bridge via a JTAG Avalon Master Bridge Changing the mSGDMA DMA mode from "Streaming to MM" to "MM to MM", and connecting mm_read to the CCT Enabling mSGDMA Pre-Fetching Options, and connecting descriptor_read_master / descriptor_write_master to the CCT These changes allow a read-capable master to exist toward the F2H bridge. [Question / Confirmation Point] In a configuration where no read-capable master exists toward the F2H bridge, is it expected (by specification) that Quartus determines the F2H interface as not connected, even if the corresponding signals (e.g. F2SOC_RDATA) appear to exist in the RTL? Even if the design logically requires write-only accesses, is a valid read path master still mandatory for the fpga2hps interface to be considered legally connected? Thank you in advance for any clarification. Replies: Re: Quartus Error When No Read Path Exists on F2H Bridge Dear Customer, Since a solution is provided and no further clarification is needed on this thread, it will be transitioned to community support for further help on doubts in this thread. Please login to the Altera Community Forum and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions. Thank you for the questions and as always pleasure having you here. Best Wishes Altera Tech Support Replies: Re: Quartus Error When No Read Path Exists on F2H Bridge Thank you very much for checking this and reproducing the issue internally. As you explained, I understand that the F2H bridge expects the READ part to be enabled by specification. Even if the actual data transfer in the design is write-only, the absence of a logically valid READ path would result in this error, which is the expected behavior. Thank you for the clear explanation and confirmation. Replies: Re: Quartus Error When No Read Path Exists on F2H Bridge I was able to reproduce this error internally. Indeed, the F2H bridge expected the "READ" part to be enabled. I'd say you can satisfy this by just adding a "avalon" device (like the JTAG master) to the CCT, in this way you can keep "Streaming to MM" if you wish.... Replies: Re: Quartus Error When No Read Path Exists on F2H Bridge Looking into this...