Problem - Problem Description VHDL simulation of the Arria 10 Hard IP for PCI Express with Avalon-MM with DMA fails. Resolution This issue is fixed in version 14.1 of the Quartus II software. For earlier releases, turn on the Allow mixed-language simulation option when you use Qsys to generate the HDL testbench. Custom Fields values: ['novalue'] Troubleshooting novalue True ['PCI Express'] ['FPGA Dev Tools Quartus II Software'] 14.1 13.1 ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']