Why doesn't Rx_data_ready bit update when synchronization is lost? - Why doesn't Rx_data_ready bit update when synchronization is lost? Description In the 10GBASE-R PHY IP core version 10.1 and earlier, the RX_DATA_READY which is bit 7 of the PCS status register (0x82) does not deassert when synchronization is lost. Affected Configurations This issue affects both Stratix® IV and Stratix V implementations of the 10GBASE-R PHY. Solution Status This issue is fixed in the 10GBASE-R PHY IP core version 11.0. Resolution The workaround is to monitor the internal signals that indicate lock status and perform a digital reset of the channel when synchronization is lost. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 11.0 10.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']