Why does the Intel® Arria®10 Display Port IP Core fails compliance testing? - Why does the Intel® Arria®10 Display Port IP Core fails compliance testing?
Description Due to a problem with the Intel® Arria® 10 Display Port IP core, Arria 10 FPGA device power pins VCCR_GXB and VCCT_GXB need to be 1.03V to meet Display Port compliance specification. Resolution Ensure that Arria 10 FPGA VCCR_GXB and VCCT_GXB pins are powered with 1.03V to meet Display Port compliance specifications. The v17.1 release of the Display Port IP core user guide will be updated to reflect VCCR_GXB and VCCR_GXT power pin voltage level requirements.
Custom Fields values:
['novalue']
Troubleshooting
FB: 443320;
False
['DisplayPort']
['FPGA Dev Tools Quartus® Prime Software Pro']
No plan to fix
17.0
['Arria® 10 FPGAs and SoCs']
['novalue']
['novalue']
['novalue'] - 2023-01-30
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