Why does Arria®10 EMIF IP Example Design Generation Fail in Quartus® Prime Standard Edition Software version 22.1 for Windows*? - Why does Arria®10 EMIF IP Example Design Generation Fail in Quartus® Prime Standard Edition Software version 22.1 for Windows*? Description Due to a problem in the Quartus® Prime Standard Edition Software version 22.1 and later for Windows*, the Arria® 10 FPGA EMIF IP example design generation will fail with the following error message: “Error: emif_0: An error has occurred when generating the simulation example design. See make_sim_design_errors.log for details.” “Error: Failed to generate example design <design name> to: <example design directory>” “Generate Example Design: completed with errors” Resolution An error encountered can be safely ignored during the simulation of Intel® Arria® 10 EMIF IP example design generation. The Simulation file sets for ModelSim-Altera® Edition Software and Aldec® Riviera-PRO™ are generated and contain the relevant design files to run the simulation successfully. Additional Information This problem is scheduled to be fixed in version 23.1 of the Quartus® Standard Edition Software. Custom Fields values: ['novalue'] Troubleshooting 14017858713 True ['External Memory Interfaces Arria® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Standard'] 23.1 22.1 ['Arria® 10 Bare Die'] ['Simulation Development Tools'] ['novalue'] ['novalue']