Why is M20K dual-port RAM data corrupted in the first read operation or the first write operation when using rd_addressstall or wr_addressstall in the Intel® Stratix® 10 device? - Why is M20K dual-port RAM data corrupted in the first read operation or the first write operation when using rd_addressstall or wr_addressstall in the Intel® Stratix® 10 device? Description Due to a problem of the Intel® Quartus® Prime Pro software version 18.1.1 and later, M20K dual-port RAM data may be corrupted in the first read operation or the first write operation when using rd_addressstall or wr_addressstall in the Intel Stratix® 10 device. This problem is observed only when rd_addressstall or wr_addressstall is initially high from the beginning of user mode and is kept high until the 1st read operation or the 1st write operation. Resolution Toggle rd_addressstall to low with a valid read address for at least one read clock cycle when using rd_addressstall Toggle wr_addressstall to low with a valid write address for at least one write clock cycle when using wr_addressstall A patch is available to fix this problem in the Intel® Quartus® Prime software version 19.3 Download patch Intel Quartus Prime 19.3 Patch 0.57 for Windows (.exe) Download patch Intel Quartus Prime 19.3 Patch 0.57 for Linux (.run) Download the Readme for Intel Quartus Prime 19.3 Patch 0.57 (.txt) This problem has been fixed since the Intel Quartus Prime Pro software version 20.3. Custom Fields values: ['novalue'] Troubleshooting 14011804912 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.3 18.1.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']