Why does the Multi-Channel DMA Intel® FPGA IP for PCI Express* generate a 512-bit Avalon® Memory-Mapped interface when configured in 2x8 256-bit mode in the Intel® Quartus® Prime Pro Edition Software version 22.4 or earlier? - Why does the Multi-Channel DMA Intel® FPGA IP for PCI Express* generate a 512-bit Avalon® Memory-Mapped interface when configured in 2x8 256-bit mode in the Intel® Quartus® Prime Pro Edition Software version 22.4 or earlier? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.4 and earlier, the Multi-Channel DMA Intel® FPGA IP for PCI Express* incorrectly generates a 512-bit data interface when configured in 2x8 256-bit mode. Resolution To work around this problem, only use the lower 256 bits of the exposed 512-bit interface. This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 22016370292 False ['Interfaces'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 23.1 22.3 ['Agilex™ 7 FPGAs and SoCs', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']