Why is the Arria 10 DDR4 MMR signal (mmr_slave_readdatavalid_0) toggling even though there is no user read request? - Why is the Arria 10 DDR4 MMR signal (mmr_slave_readdatavalid_0) toggling even though there is no user read request? Description If the Enable Memory-Mapped Configuration and Status Register (MMR) Interface option is turned ON under the Controller tab of the Arria® 10 DDR4 IP Parameter Editor, you may see the MMR signal (mmr_slave_readdatavalid_0) toggling even though there is no user read request. Resolution This problem is scheduled to be fixed in a future release of the Quartus® Prime software. Custom Fields values: ['novalue'] Troubleshooting FB: 452373 (MODIFIED RTL IS AVAILABLE PRIOR TO 17.1 FIX); False ['External Memory Interfaces Arria® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 16.1.2 ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']