Integrated Clock Filter IP Product Brief - This product brief describes the Multi-Channel Clock Filter IP Core, a high-performance timing solution that generates jitter-compliant TX clocks for multiple signal protocols on Agilex® 7 FPGA FGT transceivers. Optimized for OTN multiplexers and regenerators, the IP dynamically filters and smooths gapped clock inputs through embedded DCXO control to ensure accurate clock recovery and protocol-compliant jitter performance.