Altera® I/O Limited FPGAs Technical Brief: Stratix® 10, Arria® 10, and Arria® V FPGAs and SoCs - Describes I/O Limited (IOL) FPGAs and SoCs that limit transceiver bandwidth to <500 Gbps and I/O usage to ≤700 pins. These devices are ideal for export-controlled applications where higher transceiver or I/O utilization is restricted. - 2025-08-30
Altera IO Limited FPGA Technical Brief.pdf
- Version
- 25.1
- Product Type
- Device Families > Arria Families > Arria 10
- Device Families > Stratix Families > Stratix 10
- Device Families > Arria Families > Arria V
- Resource Type
- Documentation > Application Notes
- Source Name
- UD