Enabling Impactful DSP Designs on FPGAs with Hardened Floating-Point Implementation White Paper - Hardened floating-point DSP implementations enable algorithmic performance and faster time to market compared to traditional implementations. - 2018-10-10
wp-01227-enabling-dsp-designs-on-fpgas-with-hardened-floating-point.pdf
- Version
- 1.1
- Product Type
- Device Families > Arria Families > Arria 10
- Device Families > Stratix Families > Stratix 10
- Resource Type
- Documentation > White Papers
- Source Name
- UD