AN639: Inferring Stratix® V DSP Blocks for FIR Filtering Applications - This application note describes examples that demonstrate DSP block inference for multiple FIR filter applications from both Verilog and VHDL code. - 2017-03-05
an639.pdf
- Version
- 2.0
- Product Type
- Device Families > Stratix Families > Stratix V
- Resource Type
- Documentation > Application Notes
- Source Name
- UD