Modeling System Signal Integrity Uncertainty Considerations - This white paper describes signal integrity (SI) mechanisms that cause system-level timing uncertainty and how these mechanisms are modeled in the Quartus® Prime software Timing Analyzer to achieve timing closure for external memory interface designs - 2017-10-30
wp-01153-system-si-uncertainty.pdf
- Version
- 1.0
- Product Type
- Resource Type
- Documentation > White Papers
- Source Name
- UD