Why does the GTS HDMI FPGA IP, GTS DisplayPort PHY FPGA IP and GTS JESD204C IP Design Example fail to compile during synthesis stage when the Relative Offset has been set to a nonzero value in Dual Simplex Assignment Editor? - Why does the GTS HDMI FPGA IP, GTS DisplayPort PHY FPGA IP and GTS JESD204C IP Design Example fail to compile during synthesis stage when the Relative Offset has been set to a nonzero value in Dual Simplex Assignment Editor? Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.2, the Relative Offset for the GTS HDMI FPGA IP, GTS DisplayPort PHY IP, and GTS JESD204C IP with Dual Simplex configurations in the Agilex™ 5 FPGA devices is limited to a value of "0". The following error will be seen if a non-zero relative offset value is used. Error(13076): The node "u_DS_GROUP_0|hdmi_tx_inst0__hdmi_tx__u_tx__direct_phy_tx__g1_period_n_period_sys_lsqb_0_rsqb__period_n_channel_superset_ip_inst__n_channel_superset_top_wrapper__hal_top_wrapper_inst__hal_top_ip__one_lane_inst_0__one_lane_hal_top_p0__phy_hal_top_inst__phy_hal_top__phy_hal_coreip_inst__ch4_phy_inst__x_std_sm_flux_ingress_0" has multiple drivers. Error(20073): "non-tri-state driver "u_DS_GROUP_0|hdmi_tx_inst0__hdmi_tx__u_tx__direct_phy_tx__g1_period_n_period_sys_lsqb_0_rsqb__period_n_channel_superset_ip_inst__n_channel_superset_top_wrapper__hal_top_wrapper_inst__hal_top_ip__one_lane_inst_0__one_lane_hal_top_p0__phy_hal_top_inst__phy_hal_top__phy_hal_coreip_inst__ch4_phy_inst__x_std_sm_flux_ingress_0"" is one of the multiple drivers. Error(20073): "non-tri-state driver "u_DS_GROUP_0|dstool__tennm_sm_flux_ingress_ch1_0"" is one of the multiple drivers. Error(20073): "non-tri-state driver "u_DS_GROUP_0|dstool__tennm_sm_flux_ingress_ch2_0"" is one of the multiple drivers. Error(20073): "non-tri-state driver "u_DS_GROUP_0|dstool__tennm_sm_flux_ingress_ch3_0"" is one of the multiple drivers. Resolution There is no workaround for this problem. This problem is fixed beginning with version 24.3.1 of the Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 15016262504 False ['HDMI'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.3.1 24.3 ['Agilex™ 5 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']