Why doesn't my Clocked Video Output II (CVO II) IP core output data when pixels in parallel is >1? - Why doesn't my Clocked Video Output II (CVO II) IP core output data when pixels in parallel is >1? Description Due to a problem in the Quartus® Prime software, the CVO II IP core will not output data if Number of pixels in Parallel is greater than 1 and Video in and out use the same clock is selected in the parameter editor. Resolution To work around this problem either use a Number of pixels in Parallel setting of 1, or deselect Video in and out use the same clock and use separate clocks for the main_clock and vid_clk inputs. Note: main_clock and vid_clk can have the same or different frequencies. This problem is scheduled to be fixed in a future Quartus Prime release. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 16.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']