When using the Intel® Arria® 10/Cyclone® 10 Hard IP for PCI* Express Avalon-ST, why is the host system unable to detect the PCIe link or fail to boot up from BIOS? - When using the Intel® Arria® 10/Cyclone® 10 Hard IP for PCI* Express Avalon-ST, why is the host system unable to detect the PCIe link or fail to boot up from BIOS? Description Due to a problem with the Intel® Quartus® Prime Pro Edition software version 19.3, you may encounter the above problem, this is due to an incorrect implementation of the pld_clk_inuse signal of the Intel® Arria® 10/Cyclone® 10 Hard IP for PCI* Express. Resolution A patch is available to fix this problem. Download and install patch 0.26 for Intel® Quartus® Prime Pro Edition software version 19.3. Download patch 0.26 for Windows* ( quartus-19.3-0.26-windows.exe ) Download patch 0.26 for Linux* ( quartus-19.3-0.26-linux.run ) Download the Readme for patch 0.26 ( quartus-19.3-0.26-readme.txt ) This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition software version 19.4. Custom Fields values: ['novalue'] Troubleshooting 2205688959 True ['PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 19.4 19.3 ['Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA'] ['novalue'] ['novalue'] ['novalue']