Why do I get the error “Error (176286): Found 2 SPI blocks in design” when using Serial Flash Loader Intel® FPGA IP and ASMI Parallel II Intel FPGA IP? - Why do I get the error “Error (176286): Found 2 SPI blocks in design” when using Serial Flash Loader Intel® FPGA IP and ASMI Parallel II Intel FPGA IP? Description This error may be seen if Serial Flash Loader IP and ASMI Parallel II IP is used together in the same design. Both of Serial Flash Loader IP and ASMI Parallel II IP core require ASMI interface access. Therefore, by having both IPs in the same design would cause conflict during compilation as both IPs cannot access the ASMI block at the same time. Resolution To work around this problem, follow the steps below: Turn ON the “Share ASMI interface in the design” check box in Serial Flash Loader IP parameter. Turn ON the “Disable dedicated Active Serial Interface” check box in ASMI Parallel II IP parameter. Route ASMI signals from the ASMI Parallel II IP and connect to the Serial Flash Loader IP ASMI input/output port. Hence, both IPs should be able to share the single ASMI block within Serial Flash Loader IP. Custom Fields values: ['novalue'] Troubleshooting FB: 204061; False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Standard'] novalue 18.1 ['Arria® V FPGAs and SoCs', 'Cyclone® IV FPGAs', 'Cyclone® V FPGAs and SoCs', 'Cyclone® 10 FPGAs', 'Stratix® IV FPGAs', 'Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']