Why is EMAC RX CRC error statistics not zero when routing Cyclone® V SoC EMAC to FPGA? - Why is EMAC RX CRC error statistics not zero when routing Cyclone® V SoC EMAC to FPGA? Description Due to a problem in the Intel® Quartus® Prime Standard Edition Software version 20.1 and earlier, you may find MAC RX CRC error statistics in HPS EMAC registers when enabling HPS EMAC and routing it to FPGA in Cyclone® V SoC. Eg. You can find RX CRC error statistic is not zero in the HPS EMAC register 0x70000194 when enabling EMAC0 and routing it to the FPGA side. You can find RX CRC error statistic is not zero in the HPS EMAC register 0x72000194 when enabling EMAC1 and routing it to the FPGA side. Resolution This problem has been fixed in the Intel® Quartus® Prime Standard Edition Software version 21.1. Custom Fields values: ['novalue'] Troubleshooting 1508376740 False ['Arria® V Cyclone® V Hard Processor System IP'] ['FPGA Dev Tools Quartus® Prime Software Standard'] 21.1 20.1 ['Cyclone® V FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']