Why are the R-Tile AXI Multichannel DMA IP Design Example DMA Queues stuck when the Gen5 IP configuration links downgrade to Gen4 or lower speeds? - Why are the R-Tile AXI Multichannel DMA IP Design Example DMA Queues stuck when the Gen5 IP configuration links downgrade to Gen4 or lower speeds? Description Due to a problem in the Quartus® Prime Pro software version 25.3.1 and earlier, the AXI Multichannel DMA IP Queues will stick if the Gen5 configuration of the IP is link downgrades to Gen4 or lower. For example in the Gen5 IP is used in a Gen4 system. Resolution To fix this problem in Quartus® Prime Pro software version 25.3.1 please install patch 1.01 below. This problem is scheduled to be fix in a future release of the Quartus® Prime Pro software. IP Core AXI Multichannel DMA IP for PCI Express* Custom Fields values: ['novalue'] Troubleshooting 18044053451 novalue ['Interfaces PCIe Multi-Channel DMA (Primary)'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 25.3.1 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']