Why does Intel® Arria® 10 ATX PLL and PMA calibration fail when 'pin_perstn' of PCIe HIP keeps asserted on power up? - Why does Intel® Arria® 10 ATX PLL and PMA calibration fail when 'pin_perstn' of PCIe HIP keeps asserted on power up?
Description Due to a calibration code problem in Intel® Quartus Prime 16.1 and earlier version, Arria® 10 ATX PLL and PMA calibration failure might be found when 'pin_perstn' of PCIe HIP keeps asserted on device power up. The "cal_busy" signal will not be released with "pin_perstn" asserted. Resolution To avoid this failure, please use Intel Quartus Prime 17.1 or later version.
Custom Fields values:
['novalue']
Troubleshooting
1507323898
False
['novalue']
['FPGA Dev Tools Quartus® Prime Software Pro', 'FPGA Dev Tools Quartus® Prime Software Standard']
17.1
16.1
['Arria® 10 GT FPGA', 'Arria® 10 GX FPGA', 'Arria® 10 SX FPGA']
['novalue']
['novalue']
['novalue'] - 2021-08-25
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