Why do I see warnings when running Design Assistant on the F-Tile PMA/FEC Direct PHY Multirate Design Example for 50G-1 and 400G-8 Base Variant? - Why do I see warnings when running Design Assistant on the F-Tile PMA/FEC Direct PHY Multirate Design Example for 50G-1 and 400G-8 Base Variant? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.3, you may see the following Design Assistant critical warnings when running the F-Tile PMA/FEC Direct PHY Multirate Design Example for 50G-1 and 400G-8 Base Variant. CDC-50001 1-Bit Asynchronous Transfer Not Synchronized CDC-50002 1-Bit Asynchronous Transfer with Insufficient Constraints RDC-50001 Reconvergence of Multiple Asynchronous Reset Synchronizers in Different Reset Domains Resolution The warnings are not harmful and can be safely ignored. This problem is scheduled to be fixed in the future release of the Intel® Quartus® Prime Pro Edition Software Custom Fields values: ['novalue'] Troubleshooting 15011659835 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 23.1 22.3 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']