Why do we observe small increase in the duration of o_rx_pfc port assertion during the “PAUSE” state in the designs generated using F-Tile Ethernet Hard IP for F-Tile devices when cycles with incoming frames are padded? - Why do we observe small increase in the duration of o_rx_pfc port assertion during the “PAUSE” state in the designs generated using F-Tile Ethernet Hard IP for F-Tile devices when cycles with incoming frames are padded? Description An Ethernet design generated using F-Tile Ethernet hard IP in Quartus® Prime Pro Edition Software for F-Tile devices is showing small increase in the duration of o_rx_pfc port assertion for cycles with incoming padded frames. The slight increase in the duration of o_rx_pfc port assertion during the “PAUSE” state is due to the cycles carrying the padded data not contributing to the PAUSE time. For data rates ranging from 10G-200G, we observe an increase in the duration of 15ns for 10G and 2.5ns for 200G for each padded frame received during “PAUSE” state. 400G PFC implementation differs from other line rates so there won’t be any increase in duration of o_rx_pfc port assertion. Resolution There is no workaround and no plan to fix this problem. Custom Fields values: ['novalue'] Troubleshooting 16028309837 novalue ['Interfaces Ethernet'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 25.3 ['Agilex™ 7 FPGAs and SoCs', 'Agilex™ 9 FPGA Direct RF-Series', 'Agilex™ 9 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']