Why is rx_signaldetect always stuck high in hardware and stuck low in simulation for Arria II GX devices? - Why is rx_signaldetect always stuck high in hardware and stuck low in simulation for Arria II GX devices?
Description You may see rx_signaldetect stuck high in hardware and stuck low in simulation in ALTGX Basic mode for Arria® II GX devices. This issue is observed in Quartus II 10.1 or 10.1sp1 software, due to a bug. In order to fix the simulation issue, you can install patch 0.63 in Quartus II 10.1 or 10.1sp1 software versions. Download the version 10.1 Patch 0.63 for Windows (.exe) Download the version 10.1 Patch 0.63 for Linux (.tar) Download the Readme for the Quartus II software version 10.1 Patch 0.63 (.txt) In order to fix the hardware issue in Quartus II 11.0 and later software versions, you can 1. Add the following variable to the project QSF file. set_instance_assignment -name ARRIAIIGX_RX_CDR_LOCKUP_FIX_OVERRIDE ON -to rx_datain[0] Where rx_datain[0] is the RX channel net name using rx_signaldetect signal (e.g. SAS/SATA channel). 2. Apply the reset sequence described in solution rd11012010_759 . Arria II GZ and other GX/GT devices are not affected by this issue. Related Articles Why does the Arria II GX transceiver CDR, configured in automatic locked mode, keeps the rx_freqlocked signal asserted in any other mode except PCIe mode?
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Troubleshooting
083119
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['FPGA Dev Tools Quartus II Software']
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10.1
['Arria® II GX FPGA']
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['novalue'] - 2022-01-18
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