Error Message Citing Different I/O Standards for DQ I/O and DQS I/O Pins - Error Message Citing Different I/O Standards for DQ I/O and DQS I/O Pins Description This problem affects DDR2, DDR3, LPDDR2, QDR II, RLDRAM II, and RLDRAM 3 products. When compiling your memory interface, you might receive warning messages resembling the following: DQ I/O pins fed by DQS I/O pin "I/O pad mem_dqs[n]" assigned different I/O standards -- it is recommended that all DQ I/O pins fed by the same DQS I/O pin have the same I/O standard Resolution If you receive this warning message, check that the DQ I/O pins associated with the warning are set to SSTL-15 CLASS I, and that the DQS pin is set to DIFFERENTIAL 1.5-V SSTL CLASS I. If the pins are set as described, the warning is false and can be ignored. This issue will be fixed in a future release. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 12.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']