Why doesn't the Native PHY compensate for clock frequency differences on Stratix® V GX devices using Quartus® II software versions 12.1sp1 and earlier? - Why doesn't the Native PHY compensate for clock frequency differences on Stratix® V GX devices using Quartus® II software versions 12.1sp1 and earlier? Description Due to a bug in the Quartus® II software version 12.1sp1 and earlier, the Rate Match FIFO of the Native PHY will not recognize SKIP characters and does not compensate for clock frequency differences on Stratix® V GX devices. Resolution This problem was fixed in Quartus® II software version 13.0 Custom Fields values: ['novalue'] Troubleshooting 1408014656 False ['novalue'] ['FPGA Dev Tools Quartus II Software'] 13.0 12.1 ['Stratix® V E FPGA', 'Stratix® V FPGAs', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']