RDMA IP Core for RoCE v2 at 10 Gbps - GROVF RDMA IP Core for RoCE v2 enables low-latency, FPGA-based RDMA connectivity over Ethernet. The solution delivers 10 Gb/s throughput and integrates with standard Verbs API environments, helping… Grovf Inc. is a datacenter fabric company operating since 2017, focused on enabling next-generation 400G and 800Gbps network scale-out and scale-up solutions. The company works with leading… Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series GROVF RDMA IP Core for RoCE v2 is a soft IP solution for implementing RDMA over Converged Ethernet in FPGA-based systems. It combines FPGA IP, host drivers, reference design components, and software examples to simplify integration and accelerate development. The solution supports hardware-operated RDMA services and standard RDMA operations, including SEND, RDMA READ, and RDMA WRITE. With standard Verbs API support, dynamic configuration, hardware retransmission, and compatibility with known RNIC and soft RoCE v2 implementations, GROVF RDMA IP provides a practical path to deploying standards-based RDMA functionality on FPGA platforms. Designed for low-latency 10GbE applications, the IP helps customers reduce software overhead, improve data movement efficiency, and integrate RDMA capability into FPGA-based networking, storage, and acceleration systems. The solution supports both Initiator and Target functionality, making it suitable for full RNIC-class deployments. It includes hardware-operated RC, UC, and UD services, SEND, RDMA READ, and RDMA WRITE operations, hardware retransmission, memory protection domains, configurable RDMA queue pairs, and dynamic configuration through the Verbs API. GROVF Full RDMA is designed for demanding infrastructure use cases where high throughput, low latency, and customization are required. Customers can use it to build FPGA-based SmartNICs, HPC networking systems, GPGPU scale-out fabrics, database acceleration platforms, and storage networking solutions. Programmable congestion management, error recovery, and acknowledgement mechanisms allow system architects to tune RDMA behavior for their specific deployment requirements. Industrial Test RDMA IP Core for RoCE v2 at 10 Gbps Key Features Hardware support for RC, UC, and UD services Offering Brief No Yes No Yes Verilog Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Yes No 25.3.1 Offering Brief Production a1JUi000008Saf4MAC What's Included RTL Ordering Information GrRoCEv2_10G_FPGA a1JUi000008Saf4MAC Production Intellectual Property (IP) a1MUi00000BO8s0MAD a1MUi00000BO8s0MAD Select 2026-05-13T23:04:46.000+0000 GROVF RDMA IP Core for RoCE v2 enables low-latency, FPGA-based RDMA connectivity over Ethernet. The solution delivers 10 Gb/s throughput and integrates with standard Verbs API environments, helping customers build efficient, interoperable RDMA-enabled FPGA systems. Partner Solutions