Why is my Channel 0 Write Data reaching all of my Native PHY channels in my multichannel design? - Why is my Channel 0 Write Data reaching all of my Native PHY channels in my multichannel design?
Description Due to a problem in the Quartus® II software version 14.1, the Channel 0 reconfiguration data is incorrectly written to all channels in the instance. This problem occurs when a multichannel Native PHY instance uses a multichannel, independent Avalon memory mapped interface for dynamic reconfiguration. Resolution To work around this problem, Open the file <variant_name>/alt_xcvr_native_avmm_nf.sv. Find line 158. Change it from: Current Line 158: assign avmm_writedata[ig*8 :8] = arb_writedata[7:0]; To: Corrected Line 158: assign avmm_writedata[ig*8 :8] = arb_writedata[ig*32 :8]; This problem is scheduled to be fixed in a future release of the Quartus software.
Custom Fields values:
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Troubleshooting
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False
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['FPGA Dev Tools Quartus II Software']
novalue
14.1
['Arria® 10 FPGAs and SoCs', 'Arria® 10 GT FPGA', 'Arria® 10 GX FPGA', 'Arria® 10 SX FPGA']
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['novalue']
['novalue'] - 2023-03-23
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