Why does compilation targeting a Stratix® V device fail? - Why does compilation targeting a Stratix® V device fail? Description In various MegaCore® functions version 10.1 and earlier, designs that include an IP core and target a Stratix® V device do not compile even if you have a valid license for the IP core. Please refer to Altera® solution rd03082011_116 . Affected Configurations The following IP core designs target a Stratix V device. CIC FFT FIR Compiler NCO Compiler POS-PHY level 4 Reed-Solomon Triple-Speed Ethernet Video and Image Processing Suite Viterbi Design Impact Designs that include these IP cores and target a Stratix V device cannot compile. Solution Status This issue is fixed in the MegaCore function version 11.0. Resolution To fix this issue, if you have a valid license for these IP cores, you can follow these steps: 1. Upgrade your Quartus® II software installation to the 10.1 Service Pack 1 version. 2. Apply Patch 1.19 to your Quartus II software installation. 3. Regenerate your IP core and any others in your design that are affected by this issue. 4. Recompile your design. Custom Fields values: ['novalue'] Troubleshooting na True ['CIC IP', 'FFT IP', 'FIR II IP', 'NCO IP'] ['FPGA Dev Tools Quartus II Software'] 11.0 10.0 ['Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']