Simulation Fails When Enable Auto Error Correction Option Enabled - Simulation Fails When Enable Auto Error Correction Option Enabled Description For designs created with a version of the high-performance controller II (HPC II) earlier than 11.0, generation with the Enable Auto Error Correction option enabled on the Controller Settings tab will fail during simulation. Resolution The workaround for this issue is to add the CTL_ECC_RMW_ENABLED parameter in the� dut.v wrapper file that instantiates the controller wrapper file� alt_mem_if_ddr*_controller_top.sv , so that CTL_ECC_RMW_EN is passed to the� controller wrapper. This issue will be fixed in a future version. Custom Fields values: ['novalue'] Troubleshooting novalue True ['Simulation'] ['FPGA Dev Tools Quartus II Software'] 11.0.1 11.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']