Why does the DisplayPort Intel® FPGA Receiver IP Core with "Enable GPU Control" option unchecked fail to acknowledge I2C-over-AUX requests coming from Host DisplayPort Transmitter ? - Why does the DisplayPort Intel® FPGA Receiver IP Core with "Enable GPU Control" option unchecked fail to acknowledge I2C-over-AUX requests coming from Host DisplayPort Transmitter ? Description Due to a problem in the DisplayPort Intel® FPGA Receiver IP core prior to Intel® Quartus® Prime Pro Edition version 18.1 software and prior to Intel® Quartus® Prime Standard Edition version 19.1 software, the DisplayPort Intel® FPGA Receiver IP core may not acknowledge I2C-over-AUX requests coming from Host DisplayPort Transmitter which can cause system black screen scenario. This problem doesn't affect the DisplayPort Intel® FPGA Receiver IP core with "Enable GPU Control" option checked. Resolution To work around this problem, turn on the "Enable GPU Control" option in the DisplayPort Intel® FPGA Receiver IP Core and use DisplayPort Intel® FPGA Nios II API to manage the AUX channel handshaking. This problem is fixed beginning with Intel® Quartus® Prime Standard Edition version 19.1 software and Intel® Quartus® Prime Pro Edition version 18.1 software. Custom Fields values: ['novalue'] Troubleshooting 1507347789 True ['DisplayPort IP'] ['FPGA Dev Tools Quartus® Prime Software Pro', 'FPGA Dev Tools Quartus® Prime Software Standard'] 19.1 17.1.1 ['Arria® 10 FPGAs and SoCs', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']