CDC - Customizable Display Controller IP Core Family - Highly customizable MIPI-DPI compliant display controller supporting on-the-fly image composition from several input sources (images in memory or AXI4 Stream) with a powerful set of image processing… TES Electronic Solutions (TES) is a premier full-spectrum design house and innovative technology provider, specialized in delivering high-complexity embedded systems and silicon-proven IP as a long… Agilex™ 3 FPGA C-Series Agilex™ 5 FPGA D-Series Agilex™ 5 FPGA E-Series Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Agilex™ 9 FPGA Direct RF-Series Arria® 10 Bare Die Arria® 10 GT FPGA Arria® 10 GX FPGA Arria® 10 SX FPGA Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST FPGA Arria® V SX FPGA Cyclone® 10 GX FPGA Cyclone® 10 LP FPGA Cyclone® III Bare Die Cyclone® III FPGA Cyclone® III LS FPGA Cyclone® IV E FPGA Cyclone® IV GX FPGA Cyclone® V E FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE FPGA Cyclone® V ST FPGA Cyclone® V SX FPGA HardCopy™ II ASIC Devices HardCopy™ III ASIC Devices MAX® 10 FPGA Stratix® 10 AX FPGA Stratix® 10 Bare Die Stratix® 10 DX FPGA Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA Stratix® III FPGA Stratix® IV E FPGA Stratix® IV GT FPGA Stratix® IV GX FPGA Stratix® V E FPGA Stratix® V GS FPGA Stratix® V GX FPGA eASIC™ N3X Devices eASIC™ N3XS Devices eASIC™ N5X Devices CDC is a fully Customizable Display Controller IP supporting up to 16k resolutions (4096x4096 pixel) on a MIPI-DPI compliant parallel video output. Several features can be configured at synthesis time and programmed at run time. The main functionality of CDC is reading images (layers) from memory (or – as option in CDC-500 – as AXI4 video input stream), combining them on-the-fly e.g. by blending, cropping and windowing and generating a pixel output stream of the combined image. The CDC supports image composition as well as partial screen updates. On the output the controller provides a digital MIPI-DPI compliant RGB signal (or optionally a digital component YCbCr signal). Audio / Video Aerospace ASIC Proto Broadcast Consumer Defense Industrial Medical Test Transportation CDC - Customizable Display Controller IP Core Family Key Features Image blending / composition Offering Brief No Yes No No Encrypted VHDL VHDL Agilex™ 3 FPGA C-Series Agilex™ 5 FPGA D-Series Agilex™ 5 FPGA E-Series Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Agilex™ 9 FPGA Direct RF-Series Arria® 10 Bare Die Arria® 10 GT FPGA Arria® 10 GX FPGA Arria® 10 SX FPGA Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST FPGA Arria® V SX FPGA Cyclone® 10 GX FPGA Cyclone® 10 LP FPGA Cyclone® III Bare Die Cyclone® III FPGA Cyclone® III LS FPGA Cyclone® IV E FPGA Cyclone® IV GX FPGA Cyclone® V E FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE FPGA Cyclone® V ST FPGA Cyclone® V SX FPGA HardCopy™ II ASIC Devices HardCopy™ III ASIC Devices MAX® 10 FPGA Stratix® 10 AX FPGA Stratix® 10 Bare Die Stratix® 10 DX FPGA Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA Stratix® III FPGA Stratix® IV E FPGA Stratix® IV GT FPGA Stratix® IV GX FPGA Stratix® V E FPGA Stratix® V GS FPGA Stratix® V GX FPGA eASIC™ N3X Devices eASIC™ N3XS Devices eASIC™ N5X Devices Yes No 24.1.0 Offering Brief Production a1JUi0000049UPvMAM What's Included Q-Sys Component or (on demand) VHDL source code Ordering Information CDC-200, CDC-300, CDC-400, CDC-500 a1JUi0000049UPvMAM Production Intellectual Property (IP) a1MUi00000BO8tXMAT a1MUi00000BO8tXMAT Select 2026-05-13T22:56:11.000+0000 Highly customizable MIPI-DPI compliant display controller supporting on-the-fly image composition from several input sources (images in memory or AXI4 Stream) with a powerful set of image processing features. Partner Solutions