Critical Warning(23784): Detected undriven port 'avmm_clk' of system clock IP 'system_pll_ref_i0|systemclk_f_0'. Ensure that 'avmm_clk' port is driven by the appropriate driver - Critical Warning(23784): Detected undriven port 'avmm_clk' of system clock IP 'system_pll_ref_i0|systemclk_f_0'. Ensure that 'avmm_clk' port is driven by the appropriate driver Description After compiling your Agilex™ 7 F-Tile device in the Quartus® Prime Pro edition software version 24.2, you may see the following critical warning when using the F-Tile Reference and System PLL Clock IP. Critical Warning(23784): Detected undriven port 'avmm_clk' of system clock IP 'system_pll_ref_i0|systemclk_f_0'. Ensure that the 'avmm_clk' port is driven by an appropriate driver. In the Quartus® Prime Pro Edition Software version 24.2, the F-Tile Reference and System PLL Clock IP avmm_clk and avmm_rst ports are driven internally and disconnected from the top-level IP ports. Resolution To work around this problem, you can connect a clock to the avmm_clk port of the F-Tile Reference and System PLL Clock IP. It is also safe to ignore this critical warning. This problem will not be fixed in a future version of the Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 18039720490 False ['F-Tile Reference and System PLL Clocks IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] No plan to fix 24.2 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']