Skew Calculations in native PHY for L-tile (Stratix 10) - Skew Calculations in native PHY for L-tile (Stratix 10) Hi, I was estimating the clock skew between 2 channels of a transceivers bank. 3.9.4. Skew Calculations (as in L-tile transceiver user guide) Here, Maximum difference in number of parallel clock cycles between de-assertion of each channel's FIFO reset (N). Here, I have not understood "N" clearly. What is the meaning of de-assertion of each channel's FIFO reset? Can N take value '0' (N=0) ? With regards, HPB Replies: Re: Skew Calculations in native PHY for L-tile (Stratix 10) Thanks for your update. Using a single reset for both channel should make the N=0. thank you. Replies: Re: Skew Calculations in native PHY for L-tile (Stratix 10) Hi Chee pin, I agree that tx_digitalreset affects the FIFO. I am thinking to de-select the " USE SEPERATE TX RESET per Channel" in the reset controller IP to make N=0. In this way single reset from reset controller can assert reset to both the channel PCS FIFOs. Note: I have to consider 2 ( adjacent ) channels while considering the skews in a bank. With Regards, HPB Replies: Re: Skew Calculations in native PHY for L-tile (Stratix 10) Hi HPB, Just would like to follow up with you on this. Please let me know if there is any concern. Thank you. Best regards, Chee Pin Replies: Re: Skew Calculations in native PHY for L-tile (Stratix 10) Hi HPB, Sorry for the delay. I thought I have responded to your initial post but probably I have missed out to save into the system. Sorry for the inconvenience. Regarding the inquiry on the skew calculation, based on my understanding, the channel FIFO should be referring to the phase comp FIFO of the PCS. The reset that is affecting the FIFO is the tx_digitalreset. If your tx_digitalreset for all the bonded channels are de-asserted at the same time, the N can be 0. Please let me know if there is any concern. Thank you. Best regards, Chee Pin