Certain I/O Pins Should be Grounded for Cyclone V Hard Memory Controller Operation - Certain I/O Pins Should be Grounded for Cyclone V Hard Memory Controller Operation Description This problem affects DDR2, DDR3, and LPDDR2 products. The Cyclone V pin-out file identifies some general I/O pins that you should connect to ground when using the hard memory interface on Cyclone V devices. If you do not ground these pins, your design might experience increased crosstalk from neighboring I/Os, or reduced maximum frequency capability. Resolution There is no workaround for this issue. This issue will not be fixed. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 13.0 ['Cyclone® V FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']