Internal Error: Sub-system: PCC, File: /quartus/periph/pcc/pcc_module.cpp, Line: 1112 - Internal Error: Sub-system: PCC, File: /quartus/periph/pcc/pcc_module.cpp, Line: 1112 Description Due to a problem in the Intel® Quartus® Prime Pro Edition 18.0 and earlier, you may see this internal error when implementing a LVDS SERDES IP with Use external PLL option where its LVDS external ports ext_loaden and ext_fclk connect directly to top level. Resolution To work around the problem, connect both LVDS ext_loaden and ext_fclk to an external PLL . This problem is scheduled to be fixed in a future release of Intel® Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting FB: 565494; False ['LVDS SERDES IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 18.1 18.0 ['Arria® 10 FPGAs and SoCs', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']