Why does the Viterbi FPGA IP need both high speed and low speed licenses when either of the architecture is chosen? - Why does the Viterbi FPGA IP need both high speed and low speed licenses when either of the architecture is chosen? Description Due to a problem in the Quartus® Prime Pro Edition Software version 18.1 update 1 and earlier, IP files for both varieties are generated irrespective of the selected architecture (hybrid or parallel). As a result, both the high speed and low speed Viterbi Decoder licenses will be required for IP compilation. Resolution To work around this problem, edit the .qip file by deleting the HDL and .ocp files for IP varient not intended to use. Custom Fields values: ['novalue'] Troubleshooting 1507020394;2205694975;1409189894 False ['Viterbi IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 18.1.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']