Why does the compilation time increases when global Advanced I/O Timing settings are used for the Stratix® 10 devices? - Why does the compilation time increases when global Advanced I/O Timing settings are used for the Stratix® 10 devices? Description Due to a problem in the Quartus® Prime Pro Edition Software version 18.1, increased compilation times may occur when global Advanced I/O Timing settings are used. Resolution To work around this problem, in the Quartus® Prime Pro Edition Software version 18.1 apply the Advanced I/O Timing settings on a per pin specific basis. Beginning with the Quartus® Prime Pro Edition Software version 18.1.1 an error is flagged when a global Advanced I/O Timing setting is used for the Stratix® 10 devices. Custom Fields values: ['novalue'] Troubleshooting 1408558846 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 18.1.1 18.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']