How can I share On Chip Termination (OCT) calibration blocks if my design exceeds the maximum available? - How can I share On Chip Termination (OCT) calibration blocks if my design exceeds the maximum available?
Description All I/O banks with the same VCCIO can share one OCT calibration block. If your design exceeds the maximum number of available blocks, you can try and direct the Quartus ® II fitter to make a connection from the desired OCT calibration block to the specified pins as shown in the example below: set_instance_assignment –name TERMINATION_CONTROL_BLOCK <desired OCT BLK> -to <pin name>
Custom Fields values:
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Troubleshooting
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['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V E FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA']
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['novalue'] - 2021-08-25
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