Verilog HDL Advanced - 2 Days - Enroll Now This instructor-led class is taught in a virtual classroom over 2 half days of instruction. To perform the lab exercises, you will connect to a remote computer provided by Altera® FPGA Training and pre-configured with all the necessary tools. Information required to connect to the remote system will be provided during the class. No setup is needed. Course Content: 1. Implement synthesizable sequential and combinatorial RTL code 2. Design finite state machines using multiple encoding schemes 3. Develop simple testbenches for verification 4. Use tools in the Quartus Prime software to synthesize code and verify results 5. Run functional simulations in the Questa*-Altera® FPGA Edition software Prerequisites: 1. Completion of the "Introduction to Verilog HDL" course or some prior knowledge and use of Verilog hardware description language (HDL) 2. Background of Digital Design. 3. Understanding of Synthesis and Simulation Processes. Tools Required: Online lab setup will have the required tools and manuals.. MS_AHDL.