warning (19049) the derive_pll_clocks command is not supported in this family - warning (19049) the derive_pll_clocks command is not supported in this family Description This warning may be seen in the Quartus® software 17.0 and later when your Stratix 10 project contains derive_pll_clocks SDC constraint. Resolution To avoid this warning, you can delete this constraint from SDC file. The project using Stratix 10 device can automatically derive pll clocks. Custom Fields values: ['novalue'] Troubleshooting FB: 420471; False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 17.0 17.0 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']