Are there any known issues with Stratix V IBIS models generated in the Quartus II software for SSTL and HSUL I/O standards with input OCT? - Are there any known issues with Stratix V IBIS models generated in the Quartus II software for SSTL and HSUL I/O standards with input OCT?
Description Yes. Due to a problem in the Quartus® II software versions 13.1 update 4 and earlier, Stratix® V IBIS models generated for the following I/O standards with input On-Chip Termination (OCT) do not show the correct behaviour. SSTL-15 with input OCT 20, 30, 40, 60, 120 Ohm SSTL-135 with input OCT 20, 30, 40, 60, 120 Ohm SSTL-125 with input OCT 20, 30, 40, 60, 120 Ohm SSTL-12 with input OCT 60, 120 Ohm HSUL-12 with input OCT 34, 40, 48, 60, 80 Ohm Resolution To work around this problem, regenerate the IBIS models using the Quartus II software version 14.0 or later.
Custom Fields values:
['novalue']
Troubleshooting
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False
['novalue']
['FPGA Dev Tools Quartus II Software']
14.0
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['Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA']
['novalue']
['novalue']
['novalue'] - 2021-08-25
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