Altera® FPGA Design Flow for AMD Xilinx users - 43 Minutes Designing for Altera® FPGA devices is similar in concept and practice to planning for AMD Xilinx FPGA devices. In most cases, you can import your register transfer level (RTL) into the Quartus® Prime Pro Edition software and begin compiling your design for the target device. This training is intended for AMD Xilinx designers who are familiar with the AMD Xilinx Vivado software and want to convert existing Vivado designs to the Quartus® Prime Pro Edition software environment. This eLearning starts with a description of the current AMD Xilinx and Altera® FPGA technologies and compares devices available for the different process technologies. This training provides guidelines for converting Vivado designs, including AMD Xilinx IP Catalog modules and instantiated primitives, to the Quartus® Prime Pro Edition Software. It parallels the design flows in the Quartus® Prime Pro Edition software and the AMD Xilinx Vivado software, comparing features wherever applicable. Course Objectives At course completion, you will be able to: Describe the current Altera® FPGA Family and Architectures, and compare their device features with AMD* Xilinx* FPGAs Highlight the unique features of the Altera® Quartus® Prime Pro Design Software Explore the differences in the design flow between Altera® Quartus® Prime Pro Software and AMD Xilinx Vivado Software Demonstrate how to translate device and design constraints. Understand the design migration procedure of converting an existing AMD Xilinx Vivado Project to Altera® Quartus® FPGA Design Flow Skills Required Basic Knowledge of FPGA Design Flow If the audio for the course does not start automatically, press pause and then play on the course player. A transcript of the course audio is available in the Notes or closed captioning (CC) feature of the player. If you need assistance with this course, please email fpgatraining@altera.com . Reference Course Code: FPGA_OAMDTALT. FPGA_OAMDTALT.