Why are the peripherals under 2GB Peripheral Region still cached by the Nios® V/g processor? - Why are the peripherals under 2GB Peripheral Region still cached by the Nios® V/g processor? Description Due to a problem in the: Quartus® Prime Pro Edition Software version 23.1, 23.2, 23.3, 23.4, 24.1, 24.2, 24.3, 24.3.1, 25.1 Quartus® Prime Standard Edition Software version 23.1, 24.1 The Nios® V/g processor still caches the peripherals if they are under the 2GB Peripheral Region. This is due to a problem in the processor RTL, failing to correctly implement the 2GB Peripheral Region. Other Peripheral Region sizes are not affected; only 2GB is affected. Resolution To work around this problem, please select other Peripheral Region sizes except 2GB. This problem is scheduled to be fixed in a future release of the Quartus® Prime Edition Software. Custom Fields values: ['novalue'] Troubleshooting 15017048092 False ['Nios V/g Processor IP'] ['FPGA Dev Tools Quartus® Prime Software'] novalue 23.1 ['Agilex™ FPGA Portfolio', 'Arria® 10 Bare Die', 'Cyclone® Bare Die', 'MAX® CPLDs', 'Stratix® FPGAs'] ['novalue'] ['novalue'] ['novalue']