PCI Express Compiler Root Port Example Design Simulation Fails for Some Versions of ModelSim - PCI Express Compiler Root Port Example Design Simulation Fails for Some Versions of ModelSim Description Root port simulation fails using ModelSim versions 6.6c_1 for the Linux operating sytem (OS) or 6.6d for the Windows OS. This issue affects root port example design simulations when using ModelSim 6.6c_1 for the Linux OS or 6.6d for the Windows OS in release 10.0 of the PCI Express Compiler. Resolution To prevent this failure, add the -noimmedca option to the vsim command in the runtb.do file. Alternatively, you can update to version 10.1 of the PCI Express compiler. This issue is fixed in version 10.1 of the PCI Express example design testbench. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 10.1 10.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']