Warning (332088): No paths exist between clock target "*|altpcie_a10_hip_pipen1b|wys|core_clk_out" of clock "dut|wys~CORE_CLK_OUT" and its clock source. Assuming zero source clock latency. - Warning (332088): No paths exist between clock target "*|altpcie_a10_hip_pipen1b|wys|core_clk_out" of clock "dut|wys~CORE_CLK_OUT" and its clock source. Assuming zero source clock latency.
Description Due to a problem in the the Intel® Quartus® Prime Software versions 16.1 and earlier, you might see this warning when compiling designs containing the Intel® Arria® 10 Hard IP for PCI Express. Resolution This warning can be safely ignored. The warning is scheduled to be removed from future releases of the Intel Arria 10 Hard IP for PCI Express.
Custom Fields values:
['novalue']
Troubleshooting
FB: 401691;
False
['Arria® 10 Cyclone® 10 Hard IP for PCI Express']
['FPGA Dev Tools Quartus® Prime Software Pro']
No plan to fix
16.0
['Arria® 10 FPGAs and SoCs']
['novalue']
['novalue']
['novalue'] - 2023-01-13
external_document