Can the PCIe® nPERST PIN recieve LVTTL signal regardless of VCCIO voltage ? - Can the PCIe® nPERST PIN recieve LVTTL signal regardless of VCCIO voltage ? Description The dedicated nPERST pins may be driven by 3.3V regardless of the VCCIO voltage level of the bank without a level translator as long as the input signal meets the LVTTL VIH/VIL specification, and as long as it meets the overshoot specifications for 100% operation as defined in the "DC and Switching Characteristics for Stratix V Devices." chapter of the Stratix V handbook. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']