Why do I see a NCSim simulation error when using the Arria 10 Hard IP for PCI Express? - Why do I see a NCSim simulation error when using the Arria 10 Hard IP for PCI Express? Description You may see the error below in NCSim when using the Arria® 10 Hard IP for PCI Express®, due to a missing timescale ncelab: *F,CUMSTS: Timescale directive missing on one or more modules. ncsim: 13.10-s012: (c) Copyright 1995-2013 Cadence Design Systems, Inc. ncsim: *F,NOSNAP: Snapshot 'top_tb' does not exist in the libraries. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 13.1a10 ['Arria® 10 FPGAs and SoCs', 'Arria® 10 GT FPGA', 'Arria® 10 GX FPGA', 'Arria® 10 SX FPGA'] ['novalue'] ['novalue'] ['novalue'] - 2021-08-25

external_document