SLL HyperBus Controller (optimized for Altera FPGA) - Silicon-Proven Memory Controller IP for Intel FPGA Devices Synaptic Laboratories Ltd (SLL) are specialists in: (a) Design and supply of unified Multiple-Memory Bus Controller IP with extensive physical memory device qualification for a broad range of JEDEC… Cyclone® V E FPGA Agilex™ 3 FPGA C-Series Agilex™ 5 FPGA D-Series Cyclone® 10 LP FPGA Cyclone® 10 GX FPGA Stratix® 10 AX FPGA The Synaptic Labs xSPI Multiple Bus Memory Controller (xSPI MBMC) is a silicon-proven memory controller IP supporting a broad range of JEDEC xSPI and xSPI-like memories, including HyperRAM™, HyperFlash™, Octal NOR Flash, Octal PSRAM, Xccela® PSRAM, and emerging xSPI MRAM devices. The controller has been physically tested across multiple FPGA families and memory vendors, helping customers reduce development risk and accelerate time to market. Consumer Data Center Cloud (Public, Private, Hybrid) Wireless SLL HyperBus Controller (optimized for Altera FPGA) Key Features Silicon-proven IP used in industrial, communications, aerospace, defense, and embedded applications Offering Brief No No Yes Yes C/C++ Encrypted Verilog Cyclone® V E FPGA Agilex™ 3 FPGA C-Series Agilex™ 5 FPGA D-Series Cyclone® 10 LP FPGA Cyclone® 10 GX FPGA Stratix® 10 AX FPGA Yes No All xSPI memory devices from all vendors 24.3.1 Offering Brief Production Linux, Windows a1JUi000009FBnZMAW What's Included Encrypted IP Core, Documentation, Reference Project. Ordering Information SLL-xSPI-MBMC a1JUi000009FBnZMAW Production Acceleration / AI / Cloud Intellectual Property (IP) a1MUi00000BO8tQMAT a1MUi00000BO8tQMAT Select 2026-06-16T23:57:42.000+0000 Silicon-Proven Memory Controller IP for Intel FPGA Devices Partner Solutions