Triple Speed Ethernet Design Fails in Fitter with Internal Error for Arria V Device - Triple Speed Ethernet Design Fails in Fitter with Internal Error for Arria V Device Description The triple speed ethernet design channel_8_mac_pcs_gxb_arriav fails with internal error during the Quartus II compilation process. The failure is caused by the fitter failing to read pins with certain seed values. This issue affects Arria V devices with the following design: Device family: Arria V Device: 5AGXFB7K6F40C6 IP: Triple speed ethernet Variant: 10/100/1000Mb Ethernet MAC with 1000BASE-X/SGMII PCS No internal FIFO 8 Ports Use transceiver block, GXB Include MDIO module Enable SGMII bridge Resolution Re-run the Quartus II compilation process with a different seed value. This issue will be fixed in 13.0. Custom Fields values: ['novalue'] Troubleshooting novalue False ['Ethernet'] ['FPGA Dev Tools Quartus II Software'] 13.0 12.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']